From 70f3ba57f5fea05edbcefa5614c1d440fdbdecad Mon Sep 17 00:00:00 2001 From: Masahiro Masuda Date: Mon, 25 Apr 2022 07:32:13 +0900 Subject: [PATCH] Fix typo in shared memory layout description (#471) --- media/docs/implicit_gemm_convolution.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/media/docs/implicit_gemm_convolution.md b/media/docs/implicit_gemm_convolution.md index c7c3d487..b19e04e6 100644 --- a/media/docs/implicit_gemm_convolution.md +++ b/media/docs/implicit_gemm_convolution.md @@ -596,7 +596,7 @@ As described in the CUTLASS GTC 2019 presentation [slides](https://developer.dow [recording](https://developer.nvidia.com/gtc/2019/video/S9593), an access to Shared Memory will be conflict-free if the following conditions are satisfied across each warp: - {T0, T1, .., T7} do not access the same 128-bit bank -- {T8, T9, .., T16} do not access the same 128-bit bank +- {T8, T9, .., T15} do not access the same 128-bit bank - {T16, T17, .., T23} do not access the same 128-bit bank - {T24, T25, .., T31} do not access the same 128-bit bank