563 lines
20 KiB
Markdown
563 lines
20 KiB
Markdown
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[README](/README.md#documentation) > **Quick Start**
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# Quickstart
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## Prerequisites
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CUTLASS requires:
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- NVIDIA CUDA Toolkit (9.2 or later required, [11.1](https://developer.nvidia.com/cuda-toolkit) recommended)
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- CMake 3.12+
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- host compiler supporting C++11 or greater (g++ 7.3.0 or Microsoft Visual Studio 2015 recommended)
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- Python 3.6+
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CUTLASS may be optionally compiled and linked with
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- cuBLAS
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- cuDNN v7.6 or later
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## Initial build steps
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Construct a build directory and run CMake.
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```bash
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$ export CUDACXX=${CUDA_INSTALL_PATH}/bin/nvcc
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$ mkdir build && cd build
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$ cmake .. -DCUTLASS_NVCC_ARCHS=80 # compiles for NVIDIA Ampere GPU architecture
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```
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If your goal is strictly to build only the CUTLASS Profiler and to minimize compilation time, we suggest
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executing the following CMake command in an empty `build/` directory.
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS=80 -DCUTLASS_ENABLE_TESTS=OFF -DCUTLASS_UNITY_BUILD_ENABLED=ON
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```
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This reduces overall compilation time by excluding unit tests and enabling the unit build.
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You may reduce build times by compiling only certain operations by setting the `CUTLASS_LIBRARY_OPERATIONS` flag as shown below,
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executed from an empty `build/` directory. This only compiles 2-D convolution kernels.
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS=80 -DCUTLASS_LIBRARY_OPERATIONS=conv2d
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```
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You may also filter kernels by name by supplying a filter string with flag `CUTLASS_LIBRARY_KERNELS`.
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS=80 -DCUTLASS_LIBRARY_KERNELS=s16816gemm,s16816fprop*128x128
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```
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See more examples on selectively compiling CUTLASS GEMM and convolution kernels [here](media/docs/quickstart.md#example-cmake-commands).
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You may explicitly exclude cuBLAS and cuDNN as dependencies with the following CMake flags.
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- `-DCUTLASS_ENABLE_CUBLAS=OFF`
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- `-DCUTLASS_ENABLE_CUDNN=OFF`
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## Build and run the CUTLASS Profiler
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From the `build/` directory created above, compile the the CUTLASS Profiler.
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```bash
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$ make cutlass_profiler -j12
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```
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Then execute the CUTLASS Profiler computing GEMM, execute the following command.
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```bash
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$ ./tools/profiler/cutlass_profiler --kernels=sgemm --m=4352 --n=4096 --k=4096
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=============================
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Problem ID: 1
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Provider: CUTLASS
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Operation: cutlass_simt_sgemm_128x128_nn
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Disposition: Passed
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Status: Success
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Arguments: --m=4352 --n=4096 --k=4096 --A=f32:column --B=f32:column --C=f32:column --alpha=1 --beta=0 \
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--split_k_slices=1 --batch_count=1 --op_class=simt --accum=f32 --cta_m=128 --cta_n=128 --cta_k=8 \
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--stages=2 --warps_m=2 --warps_n=2 --warps_k=1 --inst_m=1 --inst_n=1 --inst_k=1 --min_cc=50 \
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--max_cc=1024
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Bytes: 52428800 bytes
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FLOPs: 146064539648 flops
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Runtime: 10.5424 ms
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Memory: 4.63158 GiB/s
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Math: 13854.9 GFLOP/s
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```
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To execute the CUTLASS Profiler for convolution, run the following example.
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```bash
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$ ./tools/profiler/cutlass_profiler --kernels=s1688fprop --n=8 --h=224 --w=224 --c=128 --k=128 --r=3 --s=3 --pad_h=1 --pad_w=1
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```
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To execute all CUTLASS 2-D convolution operators, execute the following.
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```bash
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$ ./tools/profiler/cutlass_profiler --operation=conv2d --n=8 --h=224 --w=224 --c=128 --k=128 --r=3 --s=3
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=============================
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Problem ID: 1
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Provider: CUTLASS
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OperationKind: conv2d
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Operation: cutlass_simt_sfprop_optimized_128x128_8x2_nhwc
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Status: Success
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Verification: ON
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Disposition: Passed
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reference_device: Passed
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Arguments: --conv_kind=fprop --n=8 --h=224 --w=224 --c=128 --k=128 --r=3 --s=3 --p=224 --q=224 --pad_h=1 --pad_w=1 \
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--stride_h=1 --stride_w=1 --dilation_h=1 --dilation_w=1 --Activation=f32:nhwc --Filter=f32:nhwc --Output=f32:nhwc \
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--conv_mode=cross --iterator_algorithm=optimized --alpha=1 --beta=0 --split_k_mode=serial --split_k_slices=1 \
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--eq_gemm_provider=none --op_class=simt --accum=f32 --cta_m=128 --cta_n=128 --cta_k=8 --stages=2 --warps_m=4 \
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--warps_n=2 --warps_k=1 --inst_m=1 --inst_n=1 --inst_k=1 --min_cc=50 --max_cc=1024
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Bytes: 2055798784 bytes
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FLOPs: 118482796544 flops
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Runtime: 8.13237 ms
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Memory: 235.431 GiB/s
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Math: 14569.3 GFLOP/s
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```
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See [documentation for the CUTLASS Profiler](profiler.md) for more details.
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## Build and run CUTLASS Unit Tests
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From the `build/` directory created above, simply build the target `test_unit` to compile and run
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all unit tests.
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```bash
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$ make test_unit -j
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...
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...
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...
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[----------] Global test environment tear-down
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[==========] 946 tests from 57 test cases ran. (10812 ms total)
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[ PASSED ] 946 tests.
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$
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```
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The exact number of tests run is subject to change as we add more functionality.
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No tests should fail. Unit tests automatically construct the appropriate runtime filters
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to avoid executing on architectures that do not support all features under test.
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The unit tests are arranged hierarchically mirroring the CUTLASS Template Library. This enables
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parallelism in building and running tests as well as reducing compilation times when a specific
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set of tests are desired.
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For example, the following executes strictly the warp-level GEMM tests.
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```bash
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$ make test_unit_gemm_warp -j
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...
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...
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[----------] 3 tests from SM75_warp_gemm_tensor_op_congruous_f16
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[ RUN ] SM75_warp_gemm_tensor_op_congruous_f16.128x128x8_32x128x8_16x8x8
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[ OK ] SM75_warp_gemm_tensor_op_congruous_f16.128x128x8_32x128x8_16x8x8 (0 ms)
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[ RUN ] SM75_warp_gemm_tensor_op_congruous_f16.128x128x32_64x64x32_16x8x8
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[ OK ] SM75_warp_gemm_tensor_op_congruous_f16.128x128x32_64x64x32_16x8x8 (2 ms)
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[ RUN ] SM75_warp_gemm_tensor_op_congruous_f16.128x128x32_32x32x32_16x8x8
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[ OK ] SM75_warp_gemm_tensor_op_congruous_f16.128x128x32_32x32x32_16x8x8 (1 ms)
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[----------] 3 tests from SM75_warp_gemm_tensor_op_congruous_f16 (3 ms total)
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...
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...
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[----------] Global test environment tear-down
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[==========] 104 tests from 32 test cases ran. (294 ms total)
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[ PASSED ] 104 tests.
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[100%] Built target test_unit_gemm_warp
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```
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## Building for Multiple Architectures
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To minimize compilation time, specific GPU architectures can be enabled via the CMake command,
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selected by [CUDA Compute Capability.](https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#compute-capabilities)
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**NVIDIA Ampere Architecture.**
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS=80 # compiles for NVIDIA Ampere GPU architecture
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```
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**NVIDIA Turing Architecture.**
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS=75 # compiles for NVIDIA Turing GPU architecture
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```
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**NVIDIA Volta Architecture.**
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS=70 # compiles for NVIDIA Volta GPU architecture
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```
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**NVIDIA Pascal Architecture.**
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS="60;61" # compiles for NVIDIA Pascal GPU architecture
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```
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**NVIDIA Maxwell Architecture.**
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS="50;53" # compiles for NVIDIA Maxwell GPU architecture
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```
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## Clang
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For experimental purposes, CUTLASS may be compiled with
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[clang 8.0](https://github.com/llvm/llvm-project/releases/download/llvmorg-8.0.1/clang+llvm-8.0.1-amd64-unknown-freebsd11.tar.xz) using the
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[CUDA 10.0 Toolkit](https://developer.nvidia.com/cuda-10.0-download-archive).
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At this time, compiling with clang enables the CUTLASS SIMT GEMM kernels (sgemm, dgemm, hgemm, igemm)
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but does not enable TensorCores.
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```bash
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$ mkdir build && cd build
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$ cmake -DCUDA_COMPILER=clang -DCMAKE_CXX_COMPILER=clang++ ..
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$ make test_unit -j
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```
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## Using CUTLASS within other applications
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Applications should list [`/include`](/include) within their include paths. They must be
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compiled as C++11 or greater.
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**Example:** print the contents of a variable storing half-precision data.
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```c++
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#include <iostream>
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#include <cutlass/cutlass.h>
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#include <cutlass/numeric_types.h>
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#include <cutlass/core_io.h>
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int main() {
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cutlass::half_t x = 2.25_hf;
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std::cout << x << std::endl;
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return 0;
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}
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```
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## Launching a GEMM kernel in CUDA
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**Example:** launch a mixed-precision GEMM targeting Turing Tensor Cores.
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_Note, this example uses CUTLASS Utilities. Be sure `tools/util/include` is listed as an include path._
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```c++
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#include <cutlass/numeric_types.h>
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#include <cutlass/gemm/device/gemm.h>
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#include <cutlass/util/host_tensor.h>
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int main() {
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// Define the GEMM operation
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using Gemm = cutlass::gemm::device::Gemm<
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cutlass::half_t, // ElementA
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cutlass::layout::ColumnMajor, // LayoutA
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cutlass::half_t, // ElementB
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cutlass::layout::ColumnMajor, // LayoutB
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cutlass::half_t, // ElementOutput
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cutlass::layout::ColumnMajor, // LayoutOutput
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float, // ElementAccumulator
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cutlass::arch::OpClassTensorOp, // tag indicating Tensor Cores
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cutlass::arch::Sm75 // tag indicating target GPU compute architecture
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>;
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Gemm gemm_op;
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cutlass::Status status;
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//
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// Define the problem size
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//
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int M = 512;
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int N = 256;
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int K = 128;
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float alpha = 1.25f;
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float beta = -1.25f;
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//
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// Allocate device memory
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//
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cutlass::HostTensor<cutlass::half_t, cutlass::layout::ColumnMajor> A({M, K});
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cutlass::HostTensor<cutlass::half_t, cutlass::layout::ColumnMajor> B({K, N});
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cutlass::HostTensor<cutlass::half_t, cutlass::layout::ColumnMajor> C({M, N});
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cutlass::half_t const *ptrA = A.device_data();
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cutlass::half_t const *ptrB = B.device_data();
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cutlass::half_t const *ptrC = C.device_data();
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cutlass::half_t *ptrD = C.device_data();
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int lda = A.device_ref().stride(0);
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int ldb = B.device_ref().stride(0);
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int ldc = C.device_ref().stride(0);
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int ldd = C.device_ref().stride(0);
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//
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// Launch GEMM on the device
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//
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status = gemm_op({
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{M, N, K},
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{ptrA, lda}, // TensorRef to A device tensor
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{ptrB, ldb}, // TensorRef to B device tensor
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{ptrC, ldc}, // TensorRef to C device tensor
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{ptrD, ldd}, // TensorRef to D device tensor - may be the same as C
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{alpha, beta} // epilogue operation arguments
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});
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if (status != cutlass::Status::kSuccess) {
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return -1;
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}
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return 0;
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}
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```
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Note, the above could be simplified as follows using helper methods defined in `HostTensor`.
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```c++
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cutlass::HostTensor<cutlass::half_t, cutlass::layout::ColumnMajor> A({M, K});
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cutlass::HostTensor<cutlass::half_t, cutlass::layout::ColumnMajor> B({K, N});
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cutlass::HostTensor<cutlass::half_t, cutlass::layout::ColumnMajor> C({M, N});
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//
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// Use the TensorRef returned by HostTensor::device_ref().
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//
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status = gemm_op({
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{M, N, K},
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A.device_ref(), // TensorRef to A device tensor
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B.device_ref(), // TensorRef to B device tensor
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C.device_ref(), // TensorRef to C device tensor
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C.device_ref(), // TensorRef to D device tensor - may be the same as C
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{alpha, beta} // epilogue operation arguments
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});
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```
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# CUTLASS Library
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The [CUTLASS Library](./tools/library) defines an API for managing and executing collections of compiled
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kernel instances and launching them from host code without template instantiations in client code.
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The host-side launch API is designed to be analogous to BLAS implementations for convenience, though its
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kernel selection procedure is intended only to be functionally sufficient. It may not launch the
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optimal tile size for a given problem. It chooses the first available kernel whose data types,
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layouts, and alignment constraints satisfy the given problem. Kernel instances and a data structure
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describing them are completely available to client applications which may choose to implement their
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own selection logic.
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[cuBLAS](https://developer.nvidia.com/cublas) offers the best performance and functional coverage
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for dense matrix computations on NVIDIA GPUs.
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The CUTLASS Library is used by the CUTLASS Profiler to manage kernel instances, and it is also used
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by several SDK examples.
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* [10_planar_complex](/examples/10_planar_complex/planar_complex.cu)
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* [11_planar_complex_array](/examples/11_planar_complex_array/planar_complex_array.cu)
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The CUTLASS Library defines enumerated types describing numeric data types, matrix and tensor
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layouts, math operation classes, complex transformations, and more.
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Client applications should specify [`tools/library/include`](/tools/library/include) in their
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include paths and link against libcutlas_lib.so.
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The CUTLASS SDK example [10_planar_complex](/examples/10_planar_complex/CMakeLists.txt) specifies
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its dependency on the CUTLASS Library with the following CMake command.
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```
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target_link_libraries(
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10_planar_complex
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PRIVATE
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cutlass_lib
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cutlass_tools_util_includes
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)
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```
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A sample kernel launch from host-side C++ is shown as follows.
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```c++
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#include "cutlass/library/library.h"
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#include "cutlass/library/handle.h"
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int main() {
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//
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// Define the problem size
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//
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int M = 512;
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int N = 256;
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int K = 128;
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float alpha = 1.25f;
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float beta = -1.25f;
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//
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// Allocate device memory
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//
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cutlass::HostTensor<float, cutlass::layout::ColumnMajor> A({M, K});
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cutlass::HostTensor<float, cutlass::layout::ColumnMajor> B({K, N});
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cutlass::HostTensor<float, cutlass::layout::ColumnMajor> C({M, N});
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float const *ptrA = A.device_data();
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float const *ptrB = B.device_data();
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float const *ptrC = C.device_data();
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float *ptrD = C.device_data();
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int lda = A.device_ref().stride(0);
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int ldb = B.device_ref().stride(0);
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int ldc = C.device_ref().stride(0);
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int ldd = D.device_ref().stride(0);
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//
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// CUTLASS Library call to execute device GEMM
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//
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cutlass::library::Handle handle;
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//
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// Launch GEMM on CUDA device.
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//
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cutlass::Status status = handle.gemm(
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M,
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N,
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K,
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cutlass::library::NumericTypeID::kF32, // data type of internal accumulation
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cutlass::library::NumericTypeID::kF32, // data type of alpha/beta scalars
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&alpha, // pointer to alpha scalar
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cutlass::library::NumericTypeID::kF32, // data type of A matrix
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cutlass::library::LayoutTypeID::kColumnMajor, // layout of A matrix
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ptrA, // pointer to A matrix in device memory
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lda, // leading dimension of A matrix
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cutlass::library::NumericTypeID::kF32, // data type of B matrix
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cutlass::library::LayoutTypeID::kColumnMajor, // layout of B matrix
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ptrB, // pointer to B matrix in device memory
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ldb, // leading dimension of B matrix
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&beta, // pointer to beta scalar
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cutlass::library::NumericTypeID::kF32, // data type of C and D matrix
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ptrC, // pointer to C matrix in device memory
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ldc, // leading dimension fo C matrix
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ptrD, // pointer to D matrix in device memory
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ldd // leading dimension of D matrix
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);
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if (status != cutlass::Status::kSuccess) {
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return -1;
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}
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return 0;
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}
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```
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# Example CMake Commands
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To instantiate all operations supporting all tile sizes, data types, and alignment constraints, specify
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`-DCUTLASS_LIBRARY_KERNELS=all` when running `cmake`.
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS='70;75;80' -DCUTLASS_LIBRARY_KERNELS=all
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```
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The above command line generates about seven thousand kernels targetting NVIDIA Ampere, Turing, and Volta architectures.
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Compiling thousands of kernels for three different architectures is time consuming. Additionaly, this would also result
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in a large binary size and on some platforms linker to fail on building the library.
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Enabling the "unity build" instantiates multiple kernel instances in each compilation unit, thereby reducing binary size
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and avoiding linker limitations on some platforms.
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```bash
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$ cmake .. -DCUTLASS_NVCC_ARCHS="70;75;80" -DCUTLASS_LIBRARY_KERNELS=all -DCUTLASS_UNITY_BUILD_ENABLED=ON
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|
```
|
|
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|
It is advised to only compile CUTLASS kernels for NVIDIA architectures one plans on running. Furthermore, kernels
|
|
can be selectively included in the CUTLASS Library by specifying filter strings and wildcard characters when executing CMake.
|
|
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|
Several examples are defined below for convenience. They may be combined as a comma-delimited list.
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|
Compling only the kernels desired reduces compilation time.
|
|
|
|
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|
## GEMM CMake Examples
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|
**Example.** All GEMM kernels targeting NVIDIA Ampere Tensor Cores.
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|
```bash
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|
$ cmake .. -DCUTLASS_NVCC_ARCHS=80 -DCUTLASS_LIBRARY_KERNELS=tensorop*gemm
|
|
```
|
|
|
|
**Example.** All GEMM kernels targeting NVIDIA Turing Tensor Cores.
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS=75 -DCUTLASS_LIBRARY_KERNELS=tensorop*gemm
|
|
```
|
|
|
|
**Example.** All GEMM kernels with FP32 accumulation targeting NVIDIA Ampere, Turing, and Volta architectures.
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS="70;75;80" -DCUTLASS_LIBRARY_KERNELS=s*gemm
|
|
```
|
|
|
|
**Example.** All kernels which expect A and B to be column-major or row-major targeting NVIDIA Ampere, Turing, and Volta architectures.
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS="70;75;80" -DCUTLASS_LIBRARY_KERNELS=gemm*nn,gemm*tt
|
|
```
|
|
|
|
**Example.** All planar complex GEMM variants targeting NVIDIA Ampere, Turing, and Volta architectures.
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS="70;75;80" -DCUTLASS_LIBRARY_KERNELS=planar_complex
|
|
```
|
|
|
|
## Convolution CMake Examples
|
|
**Example.** All convolution kernels targeting NVIDIA Ampere's 16816 Tensor Core operation
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS='80' -DCUTLASS_LIBRARY_KERNELS=s16816fprop,s16816dgrad,s16816wgrad
|
|
```
|
|
|
|
**Example.** All forward propagation (fprop) convolution kernels targeting CUDA Cores for multiple NVIDIA architectures
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS='50;60;61;70;75;80' -DCUTLASS_LIBRARY_KERNELS=sfprop
|
|
```
|
|
|
|
**Example.** All forward propagation (fprop) convolution kernels with FP32 accumulation and FP16 input targetting NVIDIA Ampere's 16816 Tensor Core operation
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS='80' -DCUTLASS_LIBRARY_KERNELS=s16816fprop_*_f16
|
|
```
|
|
|
|
**Example.** All backward weight gradient (wgrad) convolution kernels with FP32 accumulation, FP16 input, and optimized global memory iterator
|
|
targetting NVIDIA Ampere, Turing, and Volta Tensor Core operations
|
|
```bash
|
|
$ cmake .. -DCUTLASS_NVCC_ARCHS='70;75;80' -DCUTLASS_LIBRARY_KERNELS=tensorop*s*wgrad_optimized_f16
|
|
```
|
|
|
|
# Copyright
|
|
|
|
Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
|
|
|
|
```
|
|
Redistribution and use in source and binary forms, with or without modification, are permitted
|
|
provided that the following conditions are met:
|
|
* Redistributions of source code must retain the above copyright notice, this list of
|
|
conditions and the following disclaimer.
|
|
* Redistributions in binary form must reproduce the above copyright notice, this list of
|
|
conditions and the following disclaimer in the documentation and/or other materials
|
|
provided with the distribution.
|
|
* Neither the name of the NVIDIA CORPORATION nor the names of its contributors may be used
|
|
to endorse or promote products derived from this software without specific prior written
|
|
permission.
|
|
|
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
|
|
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
|
FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION BE LIABLE
|
|
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
|
OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
|
STRICT LIABILITY, OR TOR (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
```
|