121 lines
4.2 KiB
C++
121 lines
4.2 KiB
C++
/***************************************************************************************************
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* Copyright (c) 2023 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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#pragma once
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#include <cute/config.hpp>
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#include <cute/arch/mma.hpp>
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// Config
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#if ((__CUDACC_VER_MAJOR__ > 10) || (__CUDACC_VER_MAJOR__ == 10 && __CUDACC_VER_MINOR__ >= 2))
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# define CUTE_ARCH_MMA_SM75_SUPPORTED
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# if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 750))
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# define CUTE_ARCH_MMA_SM75_ENABLED
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# endif
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#endif
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namespace cute
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{
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//
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// SM75 MMA 1688 F16F16F32
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//
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struct SM75_16x8x8_F32F16F16F32_TN
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{
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using DRegisters = float[4];
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using ARegisters = uint32_t[2];
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using BRegisters = uint32_t[1];
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using CRegisters = float[4];
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// Register asm fma
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CUTE_HOST_DEVICE static void
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fma(float & d0, float & d1, float & d2, float & d3,
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uint32_t const& a0, uint32_t const& a1,
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uint32_t const& b0,
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float const& c0, float const& c1, float const& c2, float const& c3)
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{
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#if defined(CUTE_ARCH_MMA_SM75_ENABLED)
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asm volatile("mma.sync.aligned.m16n8k8.row.col.f32.f16.f16.f32"
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"{%0, %1, %2, %3},"
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"{%4, %5},"
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"{%6},"
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"{%7, %8, %9, %10};\n"
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: "=f"(d0), "=f"(d1), "=f"(d2), "=f"(d3)
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: "r"(a0), "r"(a1),
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"r"(b0),
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"f"(c0), "f"(c1), "f"(c2), "f"(c3));
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#else
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CUTE_RUNTIME_ASSERT("Attempting to use SM75_16x8x8_F32F16F16F32_TN without CUTE_ARCH_MMA_SM75_ENABLED");
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#endif
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}
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};
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////////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// SM75 MMA 8816 S8S8S32
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//
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struct SM75_8x8x16_S32S8S8S32_TN
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{
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using DRegisters = uint32_t[2];
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using ARegisters = uint32_t[1];
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using BRegisters = uint32_t[1];
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using CRegisters = uint32_t[2];
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// Register asm fma
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CUTE_HOST_DEVICE static void
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fma(uint32_t & d0, uint32_t & d1,
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uint32_t const& a0,
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uint32_t const& b0,
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uint32_t const& c0, uint32_t const& c1)
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{
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#if defined(CUTE_ARCH_MMA_SM75_ENABLED)
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asm volatile("mma.sync.aligned.m8n8k16.row.col.s32.s8.s8.s32"
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"{%0, %1},"
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"{%2},"
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"{%3},"
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"{%4, %5};\n"
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: "=r"(d0), "=r"(d1)
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: "r"(a0),
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"r"(b0),
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"r"(c0), "r"(c1));
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#else
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CUTE_RUNTIME_ASSERT("Attempting to use SM75_8x8x16_S32S8S8S32_TN without CUTE_ARCH_MMA_SM75_ENABLED");
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#endif
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}
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};
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////////////////////////////////////////////////////////////////////////////////////////////////////
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} // end namespace cute
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