505 lines
22 KiB
C++
505 lines
22 KiB
C++
/***************************************************************************************************
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* Copyright (c) 2023 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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#pragma once
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#include "cutlass/cutlass.h"
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#include "cutlass/fast_math.h"
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#include "cutlass/kernel_hardware_info.hpp"
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#include "cute/arch/cluster_sm90.hpp"
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#include "cutlass/arch/reg_reconfig.h"
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#include "cutlass/arch/mma_sm90.h"
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#include "cutlass/epilogue/collective/detail.hpp"
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#include "cutlass/gemm/gemm.h"
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#include "cutlass/gemm/dispatch_policy.hpp"
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#include "cutlass/gemm/kernel/sm90_tile_scheduler.hpp"
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#include "cutlass/pipeline/pipeline.hpp"
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#include "cute/tensor.hpp"
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///////////////////////////////////////////////////////////////////////////////
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namespace cutlass::gemm::kernel {
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///////////////////////////////////////////////////////////////////////////////
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template <
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class ProblemShape_,
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class CollectiveMainloop_,
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class CollectiveEpilogue_,
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class GridSwizzle_
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>
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class GemmUniversal<
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ProblemShape_,
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CollectiveMainloop_,
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CollectiveEpilogue_,
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GridSwizzle_,
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cute::enable_if_t<cute::is_base_of_v<KernelTmaWarpSpecializedCooperative, typename CollectiveMainloop_::DispatchPolicy::Schedule>>>
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{
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public:
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//
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// Type Aliases
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//
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using ProblemShape = ProblemShape_;
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using GridSwizzle = GridSwizzle_;
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static_assert(rank(ProblemShape{}) == 3 or rank(ProblemShape{}) == 4,
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"ProblemShape{} should be <M,N,K> or <M,N,K,L>");
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// Mainloop derived types
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using CollectiveMainloop = CollectiveMainloop_;
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using TileShape = typename CollectiveMainloop::TileShape;
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using TiledMma = typename CollectiveMainloop::TiledMma;
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using ArchTag = typename CollectiveMainloop::ArchTag;
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using ElementA = typename CollectiveMainloop::ElementA;
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using StrideA = typename CollectiveMainloop::StrideA;
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using ElementB = typename CollectiveMainloop::ElementB;
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using StrideB = typename CollectiveMainloop::StrideB;
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using DispatchPolicy = typename CollectiveMainloop::DispatchPolicy;
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using ElementAccumulator = typename CollectiveMainloop::ElementAccumulator;
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using ClusterShape = typename DispatchPolicy::ClusterShape;
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using MainloopArguments = typename CollectiveMainloop::Arguments;
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using MainloopParams = typename CollectiveMainloop::Params;
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// Epilogue derived types
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using CollectiveEpilogue = CollectiveEpilogue_;
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using ElementC = typename CollectiveEpilogue::ElementC;
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using StrideC = typename CollectiveEpilogue::StrideC;
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using ElementD = typename CollectiveEpilogue::ElementD;
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using StrideD = typename CollectiveEpilogue::StrideD;
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using EpilogueArguments = typename CollectiveEpilogue::Arguments;
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using EpilogueParams = typename CollectiveEpilogue::Params;
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static_assert(cute::is_same_v<ElementAccumulator, typename CollectiveEpilogue::ElementAccumulator>,
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"Mainloop and epilogue do not agree on accumulator value type.");
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using PersistentTileSchedulerParams = typename detail::PersistentTileSchedulerSm90::Params;
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static_assert(ArchTag::kMinComputeCapability >= 90);
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static constexpr uint32_t NumLoadWarpGroups = 1;
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static constexpr uint32_t NumMmaWarpGroups = 1;
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static constexpr uint32_t MaxThreadsPerBlock = size(TiledMma{}) + (NumLoadWarpGroups * NumThreadsPerWarpGroup);
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static constexpr uint32_t MinBlocksPerMultiprocessor = 1;
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/// Register requirement for Load and Math WGs
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static constexpr uint32_t LoadRegisterRequirement = 40;
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static constexpr uint32_t MmaRegisterRequirement = 232;
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// Kernel level shared memory storage
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struct SharedStorage {
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struct TensorStorage : cute::aligned_struct<128> {
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using MainloopTensorStorage = typename CollectiveMainloop::TensorStorage;
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using EpilogueTensorStorage = typename CollectiveEpilogue::TensorStorage;
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MainloopTensorStorage mainloop;
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EpilogueTensorStorage epilogue;
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} tensors;
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struct PipelineStorage : cute::aligned_struct<16> {
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using MainloopPipelineStorage = typename CollectiveMainloop::PipelineStorage;
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using EpiLoadPipelineStorage = typename CollectiveEpilogue::PipelineStorage;
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alignas(16) MainloopPipelineStorage mainloop;
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alignas(16) EpiLoadPipelineStorage epi_load;
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} pipelines;
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};
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static constexpr int SharedStorageSize = sizeof(SharedStorage);
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// Device side arguments
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struct Arguments {
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GemmUniversalMode mode{};
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ProblemShape problem_shape{};
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MainloopArguments mainloop{};
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EpilogueArguments epilogue{};
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KernelHardwareInfo hw_info{};
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};
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// Kernel entry point API
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struct Params {
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GemmUniversalMode mode;
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ProblemShape problem_shape;
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MainloopParams mainloop;
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EpilogueParams epilogue;
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KernelHardwareInfo hw_info;
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PersistentTileSchedulerParams scheduler;
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};
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//
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// Methods
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//
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// Convert to underlying arguments. In this case, a simple copy for the aliased type.
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static
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Params
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to_underlying_arguments(Arguments const& args, void* workspace) {
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CUTLASS_TRACE_HOST("to_underlying_arguments():");
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(void) workspace;
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auto problem_shape = args.problem_shape;
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if constexpr (detail::IF_SWAP_AB<CollectiveMainloop>::value) {
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// swap M/N
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get<0>(problem_shape) = get<1>(args.problem_shape);
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get<1>(problem_shape) = get<0>(args.problem_shape);
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}
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auto problem_shape_MNKL = append<4>(problem_shape, Int<1>{});
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// Get SM count if needed, otherwise use user supplied SM count
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int sm_count = args.hw_info.sm_count;
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if (sm_count <= 0) {
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CUTLASS_TRACE_HOST(" WARNING: Arguments do not include a valid SM count.\n"
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" For optimal performance, populate the arguments KernelHardwareInfo struct with the SM count.");
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sm_count = KernelHardwareInfo::query_device_multiprocessor_count(args.hw_info.device_id);
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}
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CUTLASS_TRACE_HOST("to_underlying_arguments(): Setting persistent grid SM count to " << sm_count);
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return {
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args.mode,
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problem_shape,
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CollectiveMainloop::to_underlying_arguments(args.problem_shape, args.mainloop, workspace),
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CollectiveEpilogue::to_underlying_arguments(args.problem_shape, args.epilogue, workspace),
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{args.hw_info.device_id, sm_count},
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detail::PersistentTileSchedulerSm90::to_underlying_arguments(problem_shape_MNKL, TileShape{}, ClusterShape{})
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};
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}
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CUTLASS_HOST_DEVICE static
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bool
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can_implement(Arguments const& args) {
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bool implementable = (args.mode == GemmUniversalMode::kGemm) or
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(args.mode == GemmUniversalMode::kBatched && rank(ProblemShape{}) == 4);
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if (!implementable) {
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CUTLASS_TRACE_HOST(" CAN IMPLEMENT: Arguments or Problem Size don't meet the requirements.\n");
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return implementable;
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}
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constexpr int tma_alignment_bits = 128;
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constexpr int min_tma_aligned_elements = tma_alignment_bits / cutlass::sizeof_bits<ElementA>::value;
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auto M = get<0>(args.problem_shape);
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auto N = get<1>(args.problem_shape);
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auto K = get<2>(args.problem_shape);
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// Contiguous dimension for the TMA tensor should be 128b aligned
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implementable = std::is_same_v<gemm::detail::StrideToLayoutTagA_t<StrideA>, layout::RowMajor> ?
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K % min_tma_aligned_elements == 0 : M % min_tma_aligned_elements == 0;
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implementable = implementable && (std::is_same_v<gemm::detail::StrideToLayoutTagB_t<StrideB>, layout::RowMajor> ?
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N % min_tma_aligned_elements == 0 : K % min_tma_aligned_elements == 0);
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implementable = implementable && (!cutlass::epilogue::collective::detail::IF_EPILOGUE_USES_TMA<CollectiveEpilogue>::value ||
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(cutlass::epilogue::collective::detail::IF_EPILOGUE_USES_TMA<CollectiveEpilogue>::value &&
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std::is_same_v<gemm::detail::StrideToLayoutTagC_t<StrideC>, layout::RowMajor> ?
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N % min_tma_aligned_elements == 0 : M % min_tma_aligned_elements == 0));
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if (!implementable) {
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CUTLASS_TRACE_HOST(" CAN IMPLEMENT: Problem Size doesn't meet the minimum alignment requirements for TMA.\n");
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return implementable;
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}
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constexpr bool is_beta_supported =
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CollectiveEpilogue::ThreadEpilogueOp::kScale == cutlass::epilogue::thread::ScaleType::Default;
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implementable = is_beta_supported || (args.epilogue.thread.beta == 0 && args.epilogue.thread.beta_ptr == nullptr);
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if (!implementable) {
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CUTLASS_TRACE_HOST(" CAN IMPLEMENT: Scaling params don't meet ThreadEpilogueOp requirements.\n");
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return implementable;
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}
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return implementable;
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}
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static
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int
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get_workspace_size(Arguments const& args) {
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return 0;
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}
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// Computes the kernel launch grid shape based on runtime parameters
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static dim3
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get_grid_shape(Params const& params) {
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// Given device SM count, set grid size s.t. we do not launch more thread blocks than we can run concurrently
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return detail::PersistentTileSchedulerSm90::get_grid_shape(params.problem_shape, TileShape{}, ClusterShape{}, params.hw_info);
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}
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static dim3
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get_block_shape() {
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return dim3(MaxThreadsPerBlock, 1, 1);
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}
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CUTLASS_DEVICE
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void
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operator()(Params const& params, char* smem_buf) {
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using namespace cute;
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using X = Underscore;
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// Any Tensor Op MMA Atom in the WGMMA ISA is arch conditional to sm90a.
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#if ! defined(__CUDA_ARCH_FEAT_SM90_ALL)
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if constexpr(size<0>(typename TiledMma::AtomShape_MNK{}) == 64) {
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printf("ERROR : Arch conditional MMA instruction used without targeting sm90a compute capability. Aborting.\n");
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return;
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}
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#endif
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// Preconditions
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static_assert(size(TiledMma{}) == 256, "Cooperative kernel must have TiledMMA operating using 256 threads.");
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static_assert(size<0>(TileShape{}) >= 128,
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"Cooperative kernel requires Tile Size to be greater than or equal to 128 along the M-dimension.");
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static_assert(rank(StrideA{}) == 3, "StrideA must be rank-3: [M, K, L]. If batch mode is not needed, set L stride to Int<0>.");
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static_assert(rank(StrideB{}) == 3, "StrideB must be rank-3: [N, K, L]. If batch mode is not needed, set L stride to Int<0>.");
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static_assert(rank(StrideC{}) == 3, "StrideC must be rank-3: [M, N, L]. If batch mode is not needed, set L stride to Int<0>.");
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static_assert(rank(StrideD{}) == 3, "StrideD must be rank-3: [M, N, L]. If batch mode is not needed, set L stride to Int<0>.");
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/* In the Cooperative kernel, Consumer0 and Consumer1 collaborate on the same tile */
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enum class WarpGroupRole {
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Producer = 0,
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Consumer0 = 1,
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Consumer1 = 2
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};
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// Kernel level shared memory storage
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SharedStorage& shared_storage = *reinterpret_cast<SharedStorage*>(smem_buf);
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int thread_idx = int(threadIdx.x);
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int warp_idx = canonical_warp_idx();
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int warp_group_thread_idx = thread_idx % NumThreadsPerWarpGroup;
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int mma_thread_idx = thread_idx % size(TiledMma{});
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auto warp_group_role = WarpGroupRole(canonical_warp_group_idx());
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int lane_predicate = cute::elect_one_sync();
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// Issue Tma Descriptor Prefetch from a single thread
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if ((warp_idx == 0) && lane_predicate) {
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CollectiveMainloop::prefetch_tma_descriptors(params.mainloop);
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CollectiveEpilogue::prefetch_tma_descriptors(params.epilogue);
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}
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// Mainloop Load pipeline
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using MainloopPipeline = typename CollectiveMainloop::MainloopPipeline;
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typename MainloopPipeline::Params mainloop_pipeline_params;
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if (warp_group_role == WarpGroupRole::Producer) {
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mainloop_pipeline_params.role = MainloopPipeline::ThreadCategory::Producer;
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}
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if (warp_group_role == WarpGroupRole::Consumer0 || warp_group_role == WarpGroupRole::Consumer1) {
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mainloop_pipeline_params.role = MainloopPipeline::ThreadCategory::Consumer;
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}
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mainloop_pipeline_params.is_leader = warp_group_thread_idx == 0;
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mainloop_pipeline_params.num_consumers = size(TiledMma{});
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mainloop_pipeline_params.transaction_bytes = CollectiveMainloop::TmaTransactionBytes;
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MainloopPipeline mainloop_pipeline(shared_storage.pipelines.mainloop, mainloop_pipeline_params);
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// Epilogue Load pipeline
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using EpiLoadPipeline = typename CollectiveEpilogue::LoadPipeline;
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typename EpiLoadPipeline::Params epi_load_pipeline_params;
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if (warp_group_role == WarpGroupRole::Producer) {
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epi_load_pipeline_params.role = EpiLoadPipeline::ThreadCategory::Producer;
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}
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if (warp_group_role == WarpGroupRole::Consumer0 || warp_group_role == WarpGroupRole::Consumer1) {
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epi_load_pipeline_params.role = EpiLoadPipeline::ThreadCategory::Consumer;
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}
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epi_load_pipeline_params.dst_blockid = cute::block_rank_in_cluster();
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epi_load_pipeline_params.producer_arv_count = 1; // 1 thread issues TMA load
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epi_load_pipeline_params.consumer_arv_count = size(TiledMma{});
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epi_load_pipeline_params.transaction_bytes = CollectiveEpilogue::TmaTransactionBytes;
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EpiLoadPipeline epi_load_pipeline(shared_storage.pipelines.epi_load, epi_load_pipeline_params);
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// Epilogue Store pipeline
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using EpiStorePipeline = typename CollectiveEpilogue::StorePipeline;
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typename EpiStorePipeline::Params epi_store_pipeline_params;
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epi_store_pipeline_params.always_wait = true;
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EpiStorePipeline epi_store_pipeline(epi_store_pipeline_params);
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// Initialize starting pipeline states for the collectives
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// Epilogue store pipe is producer-only (consumer is TMA unit, waits via scoreboarding)
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typename CollectiveMainloop::PipelineState mainloop_pipe_consumer_state;
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typename CollectiveEpilogue::LoadPipelineState epi_load_pipe_consumer_state;
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// For the DMA Load (producer) we start with an opposite phase
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// i.e., we skip all waits since we know that the buffer is indeed empty
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PipelineState mainloop_pipe_producer_state = cutlass::make_producer_start_state<MainloopPipeline>();
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PipelineState epi_load_pipe_producer_state = cutlass::make_producer_start_state<EpiLoadPipeline>();
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PipelineState epi_store_pipe_producer_state = cutlass::make_producer_start_state<EpiStorePipeline>();
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auto cluster_wait_fn = [&] () {
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// We need this to guarantee that the Pipeline init is visible
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// To all producers and consumer thread blocks in the Cluster
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if constexpr (size(ClusterShape{}) > 1) {
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cute::cluster_arrive_relaxed();
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return [] () { cute::cluster_wait(); };
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}
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else {
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__syncthreads();
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return [] () {}; // do nothing
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}
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} ();
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// Separate out problem shape for convenience
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// Optionally append _1s until problem shape is rank-4 in case its is only rank-3 (MNK)
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auto problem_shape_MNKL = append<4>(params.problem_shape, Int<1>{});
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auto M = get<0>(problem_shape_MNKL);
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auto N = get<1>(problem_shape_MNKL);
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auto K = get<2>(problem_shape_MNKL);
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auto L = get<3>(problem_shape_MNKL);
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// TMA requires special handling of strides to deal with coord codomain mapping
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// Represent the full tensors -- get these from TMA
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Tensor mA_mkl = params.mainloop.tma_load_a.get_tma_tensor(make_shape(M,K,L)); // (m,k,l)
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Tensor mB_nkl = params.mainloop.tma_load_b.get_tma_tensor(make_shape(N,K,L)); // (n,k,l)
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// Get the appropriate blocks for this thread block -- potential for thread block locality
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TiledMma tiled_mma;
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auto blk_shape = TileShape{}; // (BLK_M,BLK_N,BLK_K)
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// Make tiled views, defer the slice
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Tensor gA_mkl = local_tile(mA_mkl, blk_shape, make_coord(_,_,_), Step<_1, X,_1>{}); // (BLK_M,BLK_K,m,k,l)
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Tensor gB_nkl = local_tile(mB_nkl, blk_shape, make_coord(_,_,_), Step< X,_1,_1>{}); // (BLK_N,BLK_K,n,k,l)
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// Get pipeline stage increments from tensor shapes
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auto k_tile_count = size<3>(gA_mkl);
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auto c_tile_count = CollectiveEpilogue::get_load_pipe_increment(blk_shape);
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auto d_tile_count = CollectiveEpilogue::get_store_pipe_increment(blk_shape);
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detail::PersistentTileSchedulerSm90 scheduler;
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auto work_tile_info = scheduler.get_current_work(params.scheduler);
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// In a warp specialized kernel, collectives expose data movement and compute operations separately
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CollectiveMainloop collective_mainloop;
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CollectiveEpilogue collective_epilogue{params.epilogue};
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// Wait for all thread blocks in the Cluster
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cluster_wait_fn();
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if (warp_group_role == WarpGroupRole::Producer) {
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cutlass::arch::warpgroup_reg_dealloc<LoadRegisterRequirement>();
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while (work_tile_info.is_valid_tile) {
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// Compute m_coord, n_coord, l_coord with the post-tiled m-shape and n-shape
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auto m_coord = idx2crd(work_tile_info.M_idx, shape<2>(gA_mkl));
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auto n_coord = idx2crd(work_tile_info.N_idx, shape<2>(gB_nkl));
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auto l_coord = idx2crd(work_tile_info.L_idx, shape<4>(gB_nkl));
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auto blk_coord = make_coord(m_coord, n_coord, _, l_coord);
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// Slice with our work tile coordinates to construct mainloop tensor views
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Tensor gA = gA_mkl(_,_,m_coord,_,l_coord); // (BLK_M,BLK_K,k)
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Tensor gB = gB_nkl(_,_,n_coord,_,l_coord); // (BLK_N,BLK_K,k)
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auto k_tile_iter = cute::make_coord_iterator(shape<2>(gA));
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collective_mainloop.load(
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mainloop_pipeline,
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mainloop_pipe_producer_state,
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gA, params.mainloop.tma_load_a,
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gB, params.mainloop.tma_load_b,
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|
k_tile_iter, k_tile_count,
|
|
thread_idx,
|
|
shared_storage.tensors.mainloop
|
|
);
|
|
// Update starting pipeline state for the next tile
|
|
mainloop_pipe_producer_state.advance(k_tile_count);
|
|
|
|
if (collective_epilogue.is_source_needed()) {
|
|
collective_epilogue.load(
|
|
epi_load_pipeline,
|
|
epi_load_pipe_producer_state,
|
|
problem_shape_MNKL,
|
|
blk_shape,
|
|
blk_coord,
|
|
tiled_mma,
|
|
warp_group_thread_idx,
|
|
shared_storage.tensors.epilogue
|
|
);
|
|
// Update starting pipeline state for the next tile
|
|
epi_load_pipe_producer_state.advance(c_tile_count);
|
|
}
|
|
|
|
// Get next work tile
|
|
scheduler.advance_to_next_work();
|
|
work_tile_info = scheduler.get_current_work(params.scheduler);
|
|
} // Scheduler work fetch loop
|
|
|
|
// Make sure all Consumer Warp Groups have been waited upon
|
|
collective_mainloop.load_tail(mainloop_pipeline, mainloop_pipe_producer_state);
|
|
if (collective_epilogue.is_source_needed()) {
|
|
collective_epilogue.load_tail(epi_load_pipeline, epi_load_pipe_producer_state);
|
|
}
|
|
} // Producer Warp Group End
|
|
|
|
else if (warp_group_role == WarpGroupRole::Consumer0 || warp_group_role == WarpGroupRole::Consumer1) {
|
|
cutlass::arch::warpgroup_reg_alloc<MmaRegisterRequirement>();
|
|
|
|
while (work_tile_info.is_valid_tile) {
|
|
// Compute m_coord, n_coord, l_coord with the post-tiled m-shape and n-shape
|
|
auto m_coord = idx2crd(work_tile_info.M_idx, shape<2>(gA_mkl));
|
|
auto n_coord = idx2crd(work_tile_info.N_idx, shape<2>(gB_nkl));
|
|
auto l_coord = idx2crd(work_tile_info.L_idx, shape<4>(gB_nkl));
|
|
auto blk_coord = make_coord(m_coord, n_coord, _, l_coord);
|
|
|
|
// Allocate the the accumulators for the (M,N) blk_shape
|
|
Tensor accumulators = partition_fragment_C(tiled_mma, take<0,2>(blk_shape)); // (MMA,MMA_M,MMA_N)
|
|
|
|
collective_mainloop.mma(
|
|
mainloop_pipeline,
|
|
mainloop_pipe_consumer_state,
|
|
accumulators,
|
|
k_tile_count,
|
|
mma_thread_idx,
|
|
shared_storage.tensors.mainloop,
|
|
params.mainloop
|
|
);
|
|
|
|
// Make sure the math instructions are done and free buffers before entering the epilogue
|
|
collective_mainloop.mma_tail(
|
|
mainloop_pipeline,
|
|
mainloop_pipe_consumer_state,
|
|
k_tile_count
|
|
);
|
|
// Update starting mainloop pipeline state for the next tile
|
|
mainloop_pipe_consumer_state.advance(k_tile_count);
|
|
|
|
// Epilogue and write to gD
|
|
collective_epilogue.store(
|
|
epi_load_pipeline,
|
|
epi_load_pipe_consumer_state,
|
|
epi_store_pipeline,
|
|
epi_store_pipe_producer_state,
|
|
problem_shape_MNKL,
|
|
blk_shape,
|
|
blk_coord,
|
|
accumulators,
|
|
tiled_mma,
|
|
mma_thread_idx,
|
|
shared_storage.tensors.epilogue
|
|
);
|
|
// Update starting load/store pipeline states for the next tile
|
|
epi_load_pipe_consumer_state.advance(c_tile_count);
|
|
epi_store_pipe_producer_state.advance(d_tile_count);
|
|
|
|
// Get next work tile
|
|
scheduler.advance_to_next_work();
|
|
work_tile_info = scheduler.get_current_work(params.scheduler);
|
|
} // Scheduler work fetch loop
|
|
} // Consumer Warp Groups End
|
|
}
|
|
};
|
|
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
|
|
} // namespace cutlass::gemm::kernel
|