[Kernel] Fix marlin divide-by-zero warnings (#6904)
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@ -1128,9 +1128,11 @@ __global__ void Marlin(
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auto fetch_zp_to_registers = [&](int k, int full_pipe) {
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auto fetch_zp_to_registers = [&](int k, int full_pipe) {
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if constexpr (!has_zp) {
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if constexpr (has_zp) {
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return;
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// This code does not handle group_blocks == 0,
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}
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// which signifies act_order.
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// has_zp implies AWQ, which doesn't have act_order,
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static_assert(group_blocks != 0);
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int pipe = full_pipe % stages;
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int pipe = full_pipe % stages;
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@ -1168,6 +1170,7 @@ __global__ void Marlin(
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(reinterpret_cast<int*>(sh_zp_stage))[zp_sh_rd + i];
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(reinterpret_cast<int*>(sh_zp_stage))[zp_sh_rd + i];
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}
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}
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}
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}
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}
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};
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};
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// Execute the actual tensor core matmul of a sub-tile.
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// Execute the actual tensor core matmul of a sub-tile.
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@ -452,12 +452,17 @@ __global__ void Marlin(
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B_ptr[i] += b_gl_rd_delta_o;
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B_ptr[i] += b_gl_rd_delta_o;
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}
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}
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// Only fetch scales if this tile starts a new group
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// Only fetch scales if this tile starts a new group
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if (group_blocks != -1 && pipe % (group_blocks / thread_k_blocks) == 0) {
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if constexpr (group_blocks != -1) {
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// This assumes group_blocks >= thread_k_blocks
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// and would need to be modified to support smaller groups.
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static_assert(group_blocks >= thread_k_blocks);
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if (pipe % (group_blocks / thread_k_blocks) == 0) {
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int4* sh_s_stage = sh_s + s_sh_stage * pipe;
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int4* sh_s_stage = sh_s + s_sh_stage * pipe;
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if (s_sh_wr_pred) cp_async4(&sh_s_stage[s_sh_wr], &s[s_gl_rd]);
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if (s_sh_wr_pred) cp_async4(&sh_s_stage[s_sh_wr], &s[s_gl_rd]);
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s_gl_rd += s_gl_rd_delta;
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s_gl_rd += s_gl_rd_delta;
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}
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}
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}
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}
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}
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// Insert a fence even when we are winding down the pipeline to ensure that
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// Insert a fence even when we are winding down the pipeline to ensure that
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// waiting is also correct at this point.
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// waiting is also correct at this point.
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cp_async_fence();
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cp_async_fence();
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@ -480,7 +485,10 @@ __global__ void Marlin(
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// however, this does not seem to be a significant bottleneck, while some
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// however, this does not seem to be a significant bottleneck, while some
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// theoretically better attempts have lead to bad instruction ordering by
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// theoretically better attempts have lead to bad instruction ordering by
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// the compiler and correspondingly a noticeable drop in performance.
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// the compiler and correspondingly a noticeable drop in performance.
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if (group_blocks != -1) {
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if constexpr (group_blocks != -1) {
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// This assumes group_blocks >= thread_k_blocks
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// and would need to be modified to support smaller groups.
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static_assert(group_blocks >= thread_k_blocks);
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int4* sh_s_stage =
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int4* sh_s_stage =
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sh_s + s_sh_stage * ((group_blocks / thread_k_blocks) *
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sh_s + s_sh_stage * ((group_blocks / thread_k_blocks) *
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(pipe / (group_blocks / thread_k_blocks)));
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(pipe / (group_blocks / thread_k_blocks)));
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@ -404,12 +404,17 @@ __global__ void Marlin_24(
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meta_ptr[i] += m_gl_rd_delta_o;
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meta_ptr[i] += m_gl_rd_delta_o;
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}
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}
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// Only fetch scales if this tile starts a new group
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// Only fetch scales if this tile starts a new group
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if (group_blocks != -1 && pipe % (group_blocks / thread_k_blocks) == 0) {
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if constexpr (group_blocks != -1) {
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// This assumes group_blocks >= thread_k_blocks
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// and would need to be modified to support smaller groups.
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static_assert(group_blocks >= thread_k_blocks);
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if (pipe % (group_blocks / thread_k_blocks) == 0) {
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int4* sh_s_stage = sh_s + s_sh_stage * pipe;
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int4* sh_s_stage = sh_s + s_sh_stage * pipe;
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if (s_sh_wr_pred) cp_async4(&sh_s_stage[s_sh_wr], &s[s_gl_rd]);
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if (s_sh_wr_pred) cp_async4(&sh_s_stage[s_sh_wr], &s[s_gl_rd]);
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s_gl_rd += s_gl_rd_delta;
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s_gl_rd += s_gl_rd_delta;
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}
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}
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}
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}
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}
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// Insert a fence even when we are winding down the pipeline to ensure that
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// Insert a fence even when we are winding down the pipeline to ensure that
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// waiting is also correct at this point.
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// waiting is also correct at this point.
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cp_async_fence();
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cp_async_fence();
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@ -432,7 +437,10 @@ __global__ void Marlin_24(
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// however, this does not seem to be a significant bottleneck, while some
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// however, this does not seem to be a significant bottleneck, while some
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// theoretically better attempts have lead to bad instruction ordering by
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// theoretically better attempts have lead to bad instruction ordering by
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// the compiler and correspondingly a noticeable drop in performance.
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// the compiler and correspondingly a noticeable drop in performance.
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if (group_blocks != -1) {
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if constexpr (group_blocks != -1) {
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// This assumes group_blocks >= thread_k_blocks
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// and would need to be modified to support smaller groups.
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static_assert(group_blocks >= thread_k_blocks);
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int4* sh_s_stage =
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int4* sh_s_stage =
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sh_s + s_sh_stage * ((group_blocks / thread_k_blocks) *
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sh_s + s_sh_stage * ((group_blocks / thread_k_blocks) *
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(pipe / (group_blocks / thread_k_blocks)));
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(pipe / (group_blocks / thread_k_blocks)));
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