Revert "[Kernel] Marlin_24: Ensure the mma.sp instruction is using the ::ordered_metadata modifier (introduced with PTX 8.5)" (#5149)
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@ -32,8 +32,7 @@ __device__ inline void mma_sp(const FragB& a_frag0, const FragB& a_frag1,
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float* c = reinterpret_cast<float*>(&frag_c);
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if (psel == 0) {
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asm volatile(
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"mma.sp::ordered_metadata.sync.aligned.m16n8k32.row.col.f32.f16.f16."
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"f32 "
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"mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 "
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"{%0, %1, %2, %3}, {%4, %5, %6, %7}, {%8, %9, %10,%11}, "
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"{%12,%13,%14,%15}, %16, 0x0;\n"
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: "=f"(c[0]), "=f"(c[1]), "=f"(c[2]), "=f"(c[3])
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@ -41,8 +40,7 @@ __device__ inline void mma_sp(const FragB& a_frag0, const FragB& a_frag1,
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"r"(b[4]), "r"(b[6]), "f"(c[0]), "f"(c[1]), "f"(c[2]), "f"(c[3]),
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"r"(e[0]));
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asm volatile(
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"mma.sp::ordered_metadata.sync.aligned.m16n8k32.row.col.f32.f16.f16."
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"f32 "
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"mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 "
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"{%0, %1, %2, %3}, {%4, %5, %6, %7}, {%8, %9, %10,%11}, "
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"{%12,%13,%14,%15}, %16, 0x0;\n"
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: "=f"(c[4]), "=f"(c[5]), "=f"(c[6]), "=f"(c[7])
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@ -51,8 +49,7 @@ __device__ inline void mma_sp(const FragB& a_frag0, const FragB& a_frag1,
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"r"(e[0]));
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} else {
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asm volatile(
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"mma.sp::ordered_metadata.sync.aligned.m16n8k32.row.col.f32.f16.f16."
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"f32 "
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"mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 "
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"{%0, %1, %2, %3}, {%4, %5, %6, %7}, {%8, %9, %10,%11}, "
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"{%12,%13,%14,%15}, %16, 0x1;\n"
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: "=f"(c[0]), "=f"(c[1]), "=f"(c[2]), "=f"(c[3])
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@ -60,8 +57,7 @@ __device__ inline void mma_sp(const FragB& a_frag0, const FragB& a_frag1,
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"r"(b[4]), "r"(b[6]), "f"(c[0]), "f"(c[1]), "f"(c[2]), "f"(c[3]),
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"r"(e[0]));
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asm volatile(
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"mma.sp::ordered_metadata.sync.aligned.m16n8k32.row.col.f32.f16.f16."
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"f32 "
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"mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 "
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"{%0, %1, %2, %3}, {%4, %5, %6, %7}, {%8, %9, %10,%11}, "
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"{%12,%13,%14,%15}, %16, 0x1;\n"
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: "=f"(c[4]), "=f"(c[5]), "=f"(c[6]), "=f"(c[7])
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